Abstract: In order to achieve reliable data transmission for radars in Command and Control System, bit-oriented data link layer protocol HDLC was used for communications. Based on CPCI architecture, FPGA technology was adopted to achieve HDLC protocol controller. CPCI data reading and writing module for local bus, HDLC frame composition and analysis module, CRC code generation and verification module were all achieved. A special board-level reinforcement design is prepared for the card to adapt to military environments. Experiments show that the board can receive and send frames according to the standard data format of HDLC in harsh military environment stably and reliably.
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Key words: CPCI, FPGA, HDLC, anti-harsh environment